IFS, Senior Physical Design and DFT Automation Engineer
Job DescriptionIntel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs. With the first "Open System Foundry" model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient, and sustainable source of supply.
This job opportunity in IFS will be part of the Customer Solutions Engineering (CSE) group which is responsible for the portions of the system foundry that brings the "best of Intel" technologies to IFS customers, differentiating and accelerating their solutions from architecture to post-silicon validation.
The role of the Physical Design and DFT Automation Engineer includes but not limited to:
Architecting design infrastructure that integrates state of the art tools, flows and methodologies into a hierarchical design system that enables design engineers to efficiently execute end-to-end EDA tool flows on various technology nodes.
Develops, tests, and analyzes design automation tools, flows, and methodologies to drive efficiency and optimize PPA for SoC ASIC designs.
Partners with various teams such as physical design, RTL, DFT, tool/flow owners, and EDA vendors to continuously improve physical design methodologies.
Establishes regression flows to drive improvement in RTL to GDS flows that ensure a robust design environment.
The ideal candidate will have experience with Intel internal tools as well as industry standard tools and will guide the team to the best solution.
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Candidate should possess a Bachelor of Science degree in Computer Science or Computer Engineering or Electrical Engineering with at least 12 years additional experience or a Master of Science degree with at least 10 years additional experience
10+ years in a design automation role.
Good understanding of physical design EDA tools from Industry Standard CAD vendors, such as Synopsys and Cadence such as Fusion Compiler, Innovus, PrimeTime, Conformal.
Able to organize work within competing delivery dates from different customers.
Excellent spoken and written communication and skills.
Excellent knowledge with at least one scripting language (perl, tcl, python) and good understanding of software development practices like version control.
Good knowledge in System Verilog, Verilog, SoC design integration, design verification flow and methodology
Mentoring and coaching team members Must be detail oriented with solid written and verbal communication for expressing technical ideas and initiatives
Comfortable task switching and managing multiple tasks at the same time