Skip to main content
搜索所有职位

Analog Circuit Design Engineer

佛森, 加利福尼亚州, 美国| 希尔斯伯勒, 俄勒冈州, 美国| 聖荷西, 加利福尼亚州, 美国 职位 ID JR0274024 职位类别 Silicon Hardware Engineering 工作模式 Hybrid 经验级别 Experienced 工时类型 全职
申请

Job Description


As an Analog Circuit Design Engineer your responsibilities will include but are not limited to:

  • Designs, develops, and builds analog circuits in advanced process nodes for analog and mixed signal IPs. Apart from analog circuit design expertise, candidate should have relevant experience in SOC and Hard-IP execution role.
  • Designs floorplans, performs circuit design, extracts chip parameters, and simulates analog behavior models.
  • Creates test plans to verify design according to circuit and block microarchitecture specifications and evaluates test results.
  • Verifies functionality to optimize circuit for power, performance, area, timing, and yield goals.
  • Collaborates cross functionally to report design progress and collects, tracks, and resolves any performance and circuit design issues.
  • Optimizes performance, power, area, and reduces leakage of circuits.
  • Works with architecture and layout team to design circuit for best functionality, robustness, and electrical capabilities.

Qualifications


Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

  • Bachelor's degree in Electronics Engineering, Electrical Engineering, or related field with 2+ years’ relevant experience OR Master’s degree in Electronics Engineering, Electrical Engineering or related filed with 6 months’ relevant experience in the following areas:
    • Experience with design and analysis of analog circuits such as OPAMP, ADC, LDO, PLL, Temperature Sensors, IO, BG, oscillators.
    • Experience with analog circuit layout techniques.
    • Experience with semiconductor device physics and behavior, transistors, and basic circuit components.
    • Experience with circuit design environment & related tools such as HSpice, LTSpice, Cadence, Synopsys.
    • Experience using scripting languages such as Python or Perl.
    • Experience/interest in circuit or IP execution processes


Preferred Qualifications:

  • Master's degree in Electronics Engineering, Electrical Engineering, or related field with 3+ years in Analog Circuit Design.
  • Good understanding of interaction between digital and analog blocks at a system level.
  • Familiarity with Verilog / System Verilog / VHDL hardware coding languages.
  • Familiarity analyzing, validating and debugging analog circuits in a post-silicon environment.
  • Experience with design for manufacturability (DFM) and design for testability (DFT) considerations.
  • Strong analytical and problem-solving skills.
  • Excellent verbal and written communication skills, with the ability to present technical information clearly and concisely.
  • Experience in circuit, IP or SOC execution processes

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research. 


Inside this Business Group


In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Other Locations



US, OR, Hillsboro; US, CA, San Jose


Posting Statement


All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits


We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.



Annual Salary Range for jobs which could be performed in the US $104,890.00-$148,080.00
*Salary range dependent on a number of factors including location and experience


Working Model


This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
申请
Maggie, Offensive Security Researcher

Maggie 前沿安全研究员

“我一直梦想改变世界。在英特尔,我能发挥所长,并且更有自信。因此,我放眼完成壮举。”

查看我们提供的所有机会

您还没有最近查看的职位。

浏览所有工作

您还没有保存的工作。

浏览所有工作