Design Automation Engineer
瓜达拉哈拉, 哈利斯科州, 墨西哥
职位 ID JR0273885
职位类别 Silicon Hardware Engineering
工作模式 Hybrid
经验级别 Experienced
工时类型 全职
Job Description
The Silicon and Systems prototyping LAb is looking for a CAD Engineer or Design Automation Engineer who advocates of applying tools/flows and design methodologies to enable effective execution of complex chip design projects in diverse environments.
As part of the Design Automation team, your responsibilities might include and not be limited to:
- Design, implement, verify, and support the enablement and adoption of hardware design tools, flows, and methodologies.
- Create and verify unique hardware designs, assembles design platforms, and integrates components into hierarchical systems to provide deployment coverage for endtoend EDA tool testing on new technology nodes.
- Develop, test, and analyze engineering design automation tools, flow, and methodologies to improve efficiency and optimize power and performance.
- Support development and enhancement of platforms, databases, scripts, and tools flows for design automation.
- Build deep understanding of digital design, verification, structural and physical layout, full Chip integration, power and performance, clocking, and/or timing to enhance future TFM development.
Qualifications
Minimum qualifications are required to be initially considered for this position.
- Bachelor’s degree in Computer Science, Computer Engineering, Electrical Engineering or related field.
- 3+ years of experience in Chip design.
- 3+ years of experience in shell scripting and scripting programming languages (Perl, Python, Tcl) in Linux-based environments.
- 3+ years of experience with EDA vendor tools and methodologies related to Digital and Backend design, RTL to APR flows such as: RTL simulation, synthesis, Automatic Place and Route (APR) , Static timing analysis.
- 3+ years of experience with Synopsys or Cadence digital design tools and flows such as: FusionCompiler, PrimeTime, Innovus, etc.
- Intermediate to advanced English level.
- Must have unrestricted - permanent right to work in Mexico (The position is in Mexico, it is not eligible for employment-based visa/immigration sponsorship).
Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
- Master´s or PHD degree in Computer science, Computer engineering, Electrical engineering or related.
- Experience managing Linux based server infrastructures.
Inside this Business Group
Intel Labs is the company's world-class, industry leading research organization, responsible for driving Intel's technology pipeline and creating new opportunities. The mission of Intel Labs is to deliver breakthrough technologies to fuel Intel's growth. This includes identifying and exploring compelling new technologies and high risk opportunities ahead of business unit investment and demonstrating first-to-market technologies and innovative new usages for computing technology. Intel Labs engages the leading thinkers in academia and industry in addition to partnering closely with Intel business units.Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
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