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Silicon Logic & Validation Manager

聖荷西, Provincia de San José, 哥斯达黎加 职位 ID JR0273157 职位类别 Silicon Hardware Engineering 工作模式 Hybrid 经验级别 Experienced 工时类型 全职
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Job Description


Employees of the Networking and Edge Group (NEX) have an exciting opportunity before them: To grow Intel's leadership position in the rapidly evolving market by delivering the best silicon, software and services that meet a wide range of customer requirements. The group, a fresh, dynamic collaboration between Intel's Business Units, utilizes assets from across all of Intel. The NEX team is dedicated to helping Intel drive the next major growth inflection through productivity and new business models that are emerging as a result of IoT, AI, Edge and Networking applications.

The Network Silicon Solutions (NSS) team is looking for driven Engineers to take part in the development of products tailored to Intel's growing new business initiatives. If you are as excited as we are about these new emerging trends in technology, you are welcome to apply to this position.

Responsibilities:

  • Directs and manages a team of logic designers, micro architects, and/or power and performance design engineers responsible for IP and SoC frontend design.

  • Oversees logic design and RTL coding for IP/SoC, architecture and microarchitecture design, and simulation.

  • Supports definition and implementation of architecture, logic design and verification of components, and testing and debugging activities.

  • Provides guidance to logic design methodologies, processes, and procedures and continuously improves quality standards as well as power, performance, security, and area targets.

  • Understands security milestones expectations are met as defined by the security development lifecycle.

  • Responsible for enabling teams to execute through clear goal setting, facilitating work, maintaining accountability, applying differentiated performance management, and driving team results.

  • Drives results by inspiring people, role modeling Intel values, developing the capabilities of others, and ensuring a productive work environment.


Qualifications


Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Minimum Qualifications:

  • Bachelor's degree on Electrical engineering, Computer engineering or related.

  • 5+ years of hands-on experience in Logic Design, RTL design, SoC design, ASIC design and/or logic validation.

  • At least 3 years of experience as a Team Manager or Team Lead.

  • Advanced English level with excellent communication skills.

  • Costa Rican unrestricted work permit.


Preferred Qualifications:

  • Master degree on Electrical engineering, Computer engineering or related

  • Familiar with Synopsys tools.


Inside this Business Group


The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.


Posting Statement


All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits


We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.


Working Model


This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
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