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IP Design Verification Engineer

Pulau Pinang, 马来西亚 职位 ID JR0273266 职位类别 Silicon Hardware Engineering 工作模式 Hybrid 经验级别 Experienced 工时类型 全职
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Job Description


  • Defines and implements verification procedures (or testplans) for IP/Subsystem Hardware product based on features, requirements, and failure points.
  • Creates initial product verification methodology, selecting the verification strategy, identify failure points and developing testplans.
  • Develops verification environments and collaterals such as testbenches, stimulus/sequences, checkers, assertions, and coverage.
  • Performs tests regression, collects and analyzes regression results, root-causes and resolves regression failures.
  • Provides technical direction, guidance and support to the IP/Subsystem development team and stakeholders throughout the IP/Subsystem and customer's Product Life Cycle.
  • Influences on product development execution efficiency and quality through continuous improvement on verification methodologies and strategies used across product families.
  • Retrospect and explores new verification methodology or flow to improvise on existing ones.

Qualifications


  • Possess at least a degree in Electronics Engineering, Computer Engineering, Computer Science, or equivalent and experience with IP/SoC design or verification development.
  • Bachelors with at least 3 years' experience OR
  • Masters with at least 2 years' experience OR
  • Doctorate with at least 1 years' experience.
  • Strong analysis, debugging skills, and creative in problem solving.
  • Motivated, Self-driven and Independent
  • Someone who wants to make a difference through technology while having FUN.


Additional Qualifications (Optional):

Experience in any of these design tools and methodologies:

  • System Verilog (OVM/UVM)
  • Scripting (Python/Perl/Shell)
  • Experience in PCI Express, SPI/eSPI/xSPI, AXI would be added value
  • RTL simulators
  • Interactive debugger
  • RTL model build
  • Testbench development
  • Power-aware simulation
  • Coverage-based random constraint simulation.
  • Experience in any of these areas: Flash or Storage Devices fields / Any industry standard device OR interface protocol.

Inside this Business Group


The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.


Posting Statement


All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits


We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.


Working Model


This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
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